JEDEC Publishes Update to LPDDR5 Standard for Low Power Memory Devices
ARLINGTON, Va.--(BUSINESS WIRE)--Jan 16, 2020--
JEDEC Solid State Technology Association, the global leader in standards development for the microelectronics industry, today announced the publication of JESD209-5A, Low Power Double Data Rate 5 (LPDDR5). LPDDR5 will eventually operate at an I/O rate of 6400 MT/s, 50% higher than that of the first version of LPDDR4, and will significantly boost memory speed and efficiency for a variety of applications including mobile computing devices such as smartphones, tablets, and ultra-thin notebooks. This update to the LPDDR5 standard is focused on improving performance, power and flexibility. Additional timing parameters and minor editorial corrections have also been included. Developed by JEDEC’s JC-42.6 Subcommittee for Low Power Memories, JESD209-5A is available for download from the JEDEC website.
Key updates to this latest version of the specification include:
JEDEC is the global leader in the development of standards for the microelectronics industry. Thousands of volunteers representing nearly 300 member companies work together in over 100 JEDEC committees and task groups to meet the needs of every segment of the industry, manufacturers and consumers alike. The publications and standards generated by JEDEC committees are accepted throughout the world. All JEDEC standards are available for download from the JEDEC website. For more information, visit https://www.jedec.org/.
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CONTACT: Emily Desjardins
KEYWORD: VIRGINIA UNITED STATES NORTH AMERICA
INDUSTRY KEYWORD: ELECTRONIC DESIGN AUTOMATION SEMICONDUCTOR CONSUMER ELECTRONICS TECHNOLOGY MOBILE/WIRELESS HARDWARE
SOURCE: JEDEC Solid State Technology Association
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PUB: 01/16/2020 03:30 PM/DISC: 01/16/2020 03:29 PM