eSilicon Expands Technical Advisory Board
SAN JOSE, Calif., April 30, 2019 (GLOBE NEWSWIRE) -- eSilicon, a leading provider of FinFET ASICs, market-specific IP platforms and advanced 2.5D packaging solutions, announced today the addition of Ron Bodkin to its technical advisory board (TAB), which is focused on guiding the company’s development work associated with artificial intelligence ASICs. Existing members of the TAB include Dr. Dileep Bhandarkar, independent datacenter technologies and neural network consultant, Dr. Michael Orshansky, professor and John E. Kasch faculty fellow, Department of Electrical and Computer Engineering at UT Austin and Dr. Mattan Erez, professor and Temple Foundation faculty fellow at the Department of Electrical and Computer Engineering at UT Austin. The TAB is led internally by Patrick Soheili, vice president, business and corporate development at eSilicon.
Mr. Bodkin is currently technical director for applied artificial intelligence in Google’s Cloud CTO office. He is a serial entrepreneur with a focus on data science and big data analytics. Prior to joining Google, Bodkin was vice president and general manager, artificial intelligence for Teradata. Prior to Teradata, he was the founder and CEO of Think Big Analytics (acquired by Teradata) and vice president of engineering at Quantcast. Bodkin was also the founder of New Aspects of Software and Glassbox and the co-founder and CTO of C-bridge Internet Solutions, where he led the company to a successful IPO. He began his career as a principal consultant at Andersen Consulting and holds a B. Sc. in computer science and math from McGill University and an MS, computer science from MIT.
“The addition of Ron to our TAB expands the technical depth of the team,” said Patrick Soheili. “Dileep brings operational data center design experience, Michael and Mattan bring the research perspective and now Ron brings the data science and big data analytics perspective.”
About eSilicon eSilicon provides complex FinFET ASICs, market-specific IP platforms and advanced 2.5D packaging solutions. Our ASIC-proven, differentiating IP includes highly configurable 7nm 56G/112G SerDes plus networking-optimized 16/14/7nm FinFET IP platforms featuring HBM2 PHY, TCAM, specialized memory compilers and I/O libraries. Our neuASIC™ platform provides AI-specific IP and a modular design methodology to create adaptable, highly efficient AI ASICs. eSilicon serves the high-bandwidth networking, high-performance computing, AI and 5G infrastructure markets. www.esilicon.com
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